- 800.289.6412
- Support Login
- Contact Us
- Search
Sidense
84 Hines Road, Suite 260
Ottawa, Ontario K2K 3G3
Canada
Contact:
sales@sidense.com
(613) 287 0292
www.sidense.com
Sidense Corp., founded in 2004, is a leading developer of silicon-proven embedded non-volatile memory (NVM) intellectual property (IP). Sidense's patented one-time programmable (OTP) memory enables a wide range of electronic products which are based upon complex System on Chip (SoC) semiconductors. End-market products include home entertainment consumer products, cellular telephones, RFID, medical, automotive, defense and a host of other uses.
Sidense’s patented 1T-Fuse™ Split-Channel Antifuse Array Architecture has been specifically designed to solve the problems associated with traditional NVM, enabling reliable, low-cost and scalable Memory Semiconductor IP (MSIP) solutions.
Semiconductor and systems companies integrate Sidense IP cores into their SoC designs, saving time and money and allowing them to focus on the core competencies that differentiate their products. Sidense provides IP which is difficult and uneconomical for the device makers to try to create on their own.
Important requirements of Sidense customers include the need to incorporate NVM that can be manufactured on a standard-logic CMOS process, takes very little silicon area, has very fast read access times, cannot be reverse engineered, and consumes very little power. Sidense is the only supplier of NVM IP that can meet all of these demanding requirements.
Current Products
SiPROM is a field-programmable ROM that is a cost-effective replacement for discrete/embedded Flash and mask ROM, in one-time programmable applications such as smart cards, LCD displays, digital camera storage, and others. SiPROM is targeted at memory sizes of up to 8 Mbits.
SLP is a smaller, lower power version of SiPROM with a maximum macro size of 256 Kbits. Initially manufactured at 180nm, SLP macros target cost- and power-sensitive applications such as mobile communication devices, RFID tags and implanted medical devices.
Sidense IP is available at many leading foundries from 180nm to 40nm, giving customers a high degree of flexibility in choosing the foundry and process node for fabricating their chips. The 1T-Fuse bit-cell architecture results in Sidense’s OTP IP being very “foundry friendly,” minimizing the redesign and qualification time and cost needed to port the company’s macrocells to a new foundry (at the same process node) or to scale the macrocells to a smaller, more advanced CMOS process node.
Key Technology Features
Scalable Technology Platform.
From concept to production Sidense’s 1T-Fuse technology has been designed specifically to scale effectively on increasingly smaller process geometries, including 180nm, 130nm, 90nm, 65nm, 40nm and below, without suffering from charge leakage or other issues that are typical of NVM.
Highly Secure
Sidense’s 1T-Fuse technology enables customers to bring highly secure solutions to market by replacing external technology with SoC integration and by eliminating the possibility of reverse-engineering by third-parties. Sidense’s technology protects against reverse engineering and has been certified by third-party vendors to be viable for security applications.
Highest Density
Sidense offers the highest density embedded OTP solution for Flash and mask ROM replacement currently on the market.
Fastest Read Access
Sidense’s SiPROM macros offer the fastest read access time of any NVM solution currently on the market, with read access times down to below 10ns.
Standard Manufacturing Process
Sidense’s OTP memory IP products are implemented in standard logic CMOS processes that need no change in process technology, and no additional mask layers or special process requirements. Sidense provides broad foundry node and flavor support, providing plenty of primary and secondary production options for their customers.
Technology Flexibility
Conversion of field-programmable OTP to mask ROM is accomplished with a single mask change, with no additional process steps. Customers can combine field-programmable OTP and mask-programmable ROM in the same macro, with flexible partitioning between both and with no pre-planning needed. Sidense offers a differential read option for its macros, which significantly reduces read access times and supports broader temperature and voltage operating ranges. An emulated multi-time programmable (eMTP) option can be used to support applications that require updating of data or code stored in the OTP macro.
Sidense’s headquarters are located in Ottawa, Canada and the Company also has offices in California, Paris, Beijing, Tokyo, and Israel.