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E Pluribus Unum is the Latin motto of the United States, which roughly translated to English means “Out of many, one”. Our motto traces its origin to the founding of our country in a time where the people were organized into distinct colonies working on their own toward common goals of peace and prosperity. The motto captures in three words the concept that more can be accomplished by working together than separately.

It was an innovative concept 200 years ago that governments of different people could join in a federation for the common good. Today we see similar innovations occurring between corporations. Earlier this month IPextreme launched its Constellations™ program with a group of leading companies aimed at working together as a team to build customer relationships and supply customers with the IP technology that they need for their designs.


Please join me in welcoming the initial group of Constellations companies joining IPextreme in this initiative: CAST, NXP Semiconductors, Sidense, and Tiempo.

Best regards,


President and CEO


Blogs

Design-Reuse.com:

2009 Resolutions

If you are like me, you are likely glad to be rid of 2008 and all the bad news that has been hammered at us for the last 6 months. As we enter the new year, let me be the first to predict that negativity will be passé in 2009.
>>More

Warren is a Twitter

Those of you reading this are obviously familiar with blogging, one of the key elements of social marketing, a new movement increasingly used as a way for companies to get closer to their customers.
>>More

ElectronicsWeekly.com:

Shaking the Tree

There's nothing to gain when there's nothing to be lost
There's nothing to gain if you stay behind and count the cost
Make the decision that you can be who you can be
You can be
Tasting the fruit come to the liberty tree.

 - Peter Gabriel, from "Shaking the Tree"
>>More


 

 

 

 

 

 

 

 

 

eg3 Editor's Tech Choice Award: IPextreme M8051 IP Core

IPextreme’s 8051-compatible cores have been awarded the eg3 Editor’s Tech Choice Award for Winter 2008-09. The Editors’ Choice Award is a half-yearly award recognizing “the best of the best” products that editors consider to be deployable, with a broad range of applicability, and practical (i.e., products that are easy for designers to learn about and use).

Listen to the eg3 podcast interview with Rick Tomihiro of IPextreme which discusses practical IP for embedded systems, the 8051 cores, and a brief company overview.

Originally part of Mentor Graphics’ Inventra™ IP business, the M8051 is a silicon-proven, synthesizable processor core that is binary compatible to 8051 devices and is available in both VHDL and Verilog formats and supports Mentor Graphics Precision™ FPGA synthesis tool. In addition, users of the M8051 cores can leverage the immense ecosystem of evaluation systems, development systems, compilers and application software for the 8051 architecture. The M8051 consists of four cores:

  • M8051W is a high performance, 2-cycle implementation of the 8051 architecture

  • M8051EW is a debug-enhanced version of the M8051W

  • M8051 is the classic 12-cycle implementation the 8051 architecture

  • M8052 is an enhanced variant of the M8051 with more memory and a 3rd timer

If you would like more information regarding the M8051 lineup, please visit our website.


Tech Tip

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tech Tip: Successful IP Equals Product plus Service
By Jim Lipman - Marketing Director - Sidense

Suppliers in various evolving segments of the semiconductor industry have learned, often painfully, that customer service goes hand-in-hand with a good product.  This has certainly been true for EDA and ASIC vendors and now has become a key differentiator for silicon IP.

Unfortunately, IP integration is usually not turnkey, since each chip in which an IP core, soft or hard, is placed represents a different system environment for that IP.  The more complex or unique the IP is, the more difficult it is to achieve silicon success without assistance from the IP developer.  Even IP that is designed to comply with very well understood and defined standards, such as a USB communications core, can lead to timing or interface problems when integrated into some chips.  This is where the IP vendor’s level of service becomes critical.

The need to take into account an IP vendor’s ability (and willingness) to support their customers is part of internal IP acceptance criteria for many companies and was part of the Quality IP metric (QIP) developed by the VSI Alliance.  These criteria recognize the importance of IP vendor support as a figure of merit when evaluating IP quality between different sources, particularly important for commodity IP, where product performance differentiation is often not very apparent.

Successful integration of all semiconductor IP, from library to highly complex “star” cores, depends on good IP vendor/integrator communications.  As an IP user, first narrow your IP supplier choices to vendors who have products that meet your specifications.  Then select a vendor who you feel can provide the level of support you need to successfully implement their product into your designs.  Make sure to ask the right questions about what engineering, documentation and debugging assistance they will give you spanning the time you sign the contract until you have working silicon.  Just as important are the questions the IP supplier should be asking you to understand your particular design-specific requirements.   Of course, the time it takes the IP vendor to respond to integrator requests is also a key factor when determining with which vendor to engage.

Most IP business is highly competitive and you frequently have multiple sources for your IP which, very often, provides differentiation between your product and that of your competition.  The best IP in the world isn’t much help if it doesn’t work right on your chip.  Make sure to choose IP vendors who will be there for you, beyond the sale, to help you achieve silicon success.

Sidense

www.sidense.com


The Constellations™ Program

 

 

Constellations is a community of independent semiconductor IP companies who collaborate at the sales level by sharing sales intelligence and market wisdom to provide a virtual world-wide sales footprint.

Members of the program can submit known opportunities for IP they don’t carry to the Constellations database where they are routed to the sales team of the relevant member companies.

To join Constellations click Here

CAST Logo

CAST provides “IP that Works” — dozens of key cores and subsystems based on 15 years of helping designers successfully develop ASIC and FPGA systems. Our line of processors, interfaces, multimedia, encryption, and other IP cores has been proven with hundreds of customers, and our experienced, global sales and support team is ready to help you 24/7.

 

IPextreme

IPextreme licenses "famous IP" (intellectual property) and methodologies developed by large semiconductor companies to chip designers worldwide.These production-proven IP products serve both broad horizontal markets and specific verticals such as consumer and automotive. With a decade of experience in developing, packaging, licensing and supporting IP, customers and partners can count on IPextreme expertise.

 

NXP is a leading semiconductor company founded by Philips more than 50 years ago. Headquartered in Europe, the company has about 30,000 employees working in more than 30 countries and posted sales of USD 5.4 billion (including the Mobile & Personal business) in 2008. NXP creates semiconductors, system solutions and software that deliver better sensory experiences in TVs, set-top boxes, identification applications, mobile phones, cars and a wide range of other electronic devices. Currently under this Constellations program NXP offers its ultra low power CoolFlux DSP & CoolFlux BSP soft cores, together with application software. News from NXP is located at www.nxp.com.

 

Sidense Corp provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. The Company's patented one-transistor 1T-FuseT architecture provides the industry's smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. Sidense memory IP is available at UMC, TSMC, SMIC, Tower, Fujitsu Microelectronics, IBM and Chartered at 180nm, 130nm, 110nm, 90nm, 65nm, and 55nm and is scalable to 40nm and below.

 

Tiempo develops and markets core IPs designed in a disruptive asynchronous technology, allowing its customers to build ultra-low power and secured chips. Tiempo IP portfolio includes soft and hard cores of asynchronous microcontrollers, microprocessors and crypto-processors, and is supported by an automated synthesis tool using a standard input language. Targeted applications are chips for embedded electronics (sensors, metering, RFID, automotive, mobile consumer) and secured devices (smartcards, NFC).

The intellectual property available through IPextreme is silicon proven in millions of units of chips worldwide. Here are some examples:


infineon logo

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Product: TC1166

The TC1166 is based on the award-winning unified 32-bit TriCore™ architecture combining RISC, CISC and DSP functionality in a single chip. TC1166 is optimized for highly demanding applications where embedded real-time performance and DSP capabilities combined with an extremely fast interrupt response time and the highest level of fault tolerance are needed. It also offers serial interfaces with MultiCAN, Micro Second (MSC) bus and Micro Link Interface (MLI), making it the most cost effective 32-bit microcontroller solution for real-time control.

Click on these links to download MSC or MLI Standard Specifications.

>>More on Infineon Tricore

Contact Us


cypress logo

cypchip

Product:Tetra Hub USB 2.0 Hub

The Cypress TetraHub USB 2.0 Hub is a high-performance low-system-cost solution for USB. The TetraHub USB 2.0 Hub integrates 1.5k upstream pull-up resistors for full-speed operation and all downstream 15k pull-down resistors as well as series termination resistors on all upstream and downstream D+ and D– pins. This results in optimization of system costs by providing built-in support for the USB 2.0 specification.

>>More on Cypress High-Speed USB2.0 Hub Controller

Contact Us


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The IPextreme Core Store is our online IP marketplace where you can purchase select IP at incredibly competitive prices.

Famous IP    
HCS08 Processor
$10,000

V1 ColdFire Processor

$10,000
   
IP Reuse Methodology    
NXP CoReUse Foundation eBooks   $199
CoReUse System Level Design
$50
CoReUse CTAG Plug & Play Test Access
$50
 

Our complete IP catalog is available on our website at:

www.ip-extreme.com/IP



IPextreme Levels the Playing Field with Constellations™ Program

IPextreme Releases CoReUse Improvements for 2009

IPextreme Celebrates First Anniversary of Core Store

CoReUse Named as Finalist for 2009 DesignVision Award for Semiconductor IP

IPextreme Teams with Mentor Graphics on 8051 Cores

IPextreme to Give Tutorial on Industry’s First IP-based Design Methodology at DesignCon 2009

Achieve Maximum Value from your IP Assets
Manage your IP as you would manage all your valuable assets


Please join Dassault Systèmes, Kalypso, and GSA for a panel discussion and networking event that will provide you with valuable information on managing Intellectual Property. By participating, you will hear from key industry leaders and visionaries on effective IP management strategies for OEM, EMS and semiconductor companies.

http://matrixone.ed4.net/profile/125/signup.cfm?L=5765379

Intellectual Property Panel Discussion
Register for this event »

Keynote:
Warren Savage

Date:

April 29, 2009

Time:

6PM–9PM

Location:

Hotel Valencia
355 Santana Row
San Jose, California 95128

Food & Drinks Provided

ChipEx2009

ChipEX 2009, the first international event of the Israeli semiconductor industry, will
be held on May 6, 2009 at the AVENUE convention center in Airport city. This
professional industry event is produced by TAPEOUT magazine in cooperation with
the GSA (Global Semiconductor Alliance) and the Israeli Export Institute.

ChipEX 2009 target audience are all people involved with the semiconductor industry
including engineers, R&D managers, senior executives, CEOs of fabless
semiconductor companies, multinational design centers, consultants, experts,
venture capital managers involved with the semiconductor industry as well as
electrical/electronics/computers students & professors from the various universities
around Israel.

Keynote: Warren Savage
Date: Wednesday, May 6, 2009
Location: Airport City, Israel

 


IPextreme, Inc. 307 Orchard City Drive, Suite 202, Campbell, CA 95008
Phone: +1 408 540 0095

 

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