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Silicon Valley IP Users Conference 2015
Presented by Constellations™

Tuesday, 20 October 2015
Testarossa Winery
Los Gatos, California

IP-centric technical presentations
Panel discussions
Wine tasting

Testarossa Ivy

Together with its coalition of Constellations companies, IPextreme is pleased to present Silicon Valley IP Users Conference 2015, a private conference aimed at bridging the gap between IP suppliers and IP users. This one-day event will feature content surrounding new technology, market trends, and challenges facing players in the IP industry.

A full conference agenda can be found below. Guests can register for Morning Only, Afternoon Only, or Full Day attendance.

To register for this fun and informative get-together, send email to SVIPUC@ip-extreme.com

Morning Session (9:00 AM – 12:00 PM)

Time Speaker/Topic
8:30-9:00 Registration & Breakfast
9:00 Morning Keynote Address by Eric Stein, Director, Licensing and Contract Compliance, PricewaterhouseCoopers
Topic: IP Compliance: Challenges and Best Practices
Abstract: Eric Stein is a director in PwC's forensic accounting practice. He has over 15 years of licensing management and contract compliance experience. Eric specializes in advising technology licensors and licensees. He has performed over 200 contract compliance inspections throughout the world.
9:20 Technical Presentation by SoC Solutions
Topic: What’s Your Bright Idea?
Speaker: Jim Bruister, President
Abstract: We have all witnessed the “light bulb” moment when someone has a brilliant new idea. It happens every day in the semiconductor industry. Chips today are expected to be like top students: they have to be smart, have good communication skills, speak different languages, and do it all while exerting very little effort. This common thread translates very well to IoT chip architecture. In this session, we will explore those architectures and how they enable new designs and products for the connected world.
9:50 Technical Presentation by IPextreme
Topic: When IP Falls Through the Cracks
Speaker: Warren Savage, President & CEO
Abstract: As the amount of 3rd-party IP content in today’s chips continues to explode, it is creating not only a “big data” problem around IP management to ensure the right versions of the IP is being used, but also a big liability risk around the increasing problem of “accidental reuse” wherein IP is being reused within the company without a valid license. In this session, IPextreme will delve into some new technology we have developed to allow semiconductor companies to gain a clear picture of the 3rd-party IP that is contained in their chips—without reliance on GDSII tags.
10:20-10:30 Short Break
10:30 Technical Presentation by Sonics, Inc.
Topic: Introducing the ICE-Grain Power Architecture for Mainstream SoC Designs—the Semiconductor IP Industry’s First Power Management Solution
Speaker: Randy Smith, VP Marketing
Abstract: Power is on everyone’s mind, whether you’re creating an application processor for mobile phones or an SoC for IoT or Wearable applications. Conventional software-based power management approaches don’t save enough power. This presentation will cover the need for a hardware-based power management solution for mainstream SoC designs. It will introduce Sonics’ ICE-Grain Power Architecture, which is the semiconductor IP industry’s first complete power management subsystem. It will discuss the key capabilities and benefits of the ICE-Grain Power Architecture and explain how the solution makes sophisticated power management and control techniques available to a broader audience.
11:00 Panel Discussion: State of the Semiconductor IP Market: Where are we? Where are we going?
Moderator: Ed Sperling, Semiconductor Engineering
• Judd Heape, Vice President, Product Applications, Apical
• Bernard Murphy, Principal, edabuzz.com
• Rob Aitken, Research & Development Fellow, ARM
• Mike Gianfagna, VP Marketing, eSilicon
Overview: This panel will delve into many of the semiconductor IP industry’s most pressing questions:
• Is the IP market yet fully mature, or still an “awkward teenager”?
• What are the effects of consolidation?
• What is wrong with the market at present? What works well?
• Is the market evolving in such a way that it can continue to serve the needs of customers?
We will conclude the discussion with a brief roundtable segment in which the audience may pose questions to the moderator and panelists.

Networking Lunch (12:00 PM – 1:00 PM)

Enjoy a thoughtfully crafted buffet-style meal, great conversation, and California’s famous mild autumn weather in Testarossa’s Wine Bar 107 courtyard.

Afternoon Session (1:00 PM – 4:00 PM)

Time Speaker/Topic
12:30-1:00 Afternoon-Only Registration
1:00 Afternoon Opening Remarks by Warren Savage, President & CEO, IPextreme
Topic: Buying IP Without Selling Your Soul
Abstract: Warren Savage is perhaps one of the most recognizable figures in the semiconductor industry. He has spent his entire career in Silicon Valley working with leading companies, including Fairchild Semiconductor, Tandem Computers, and Synopsys, where he focused on the problem of building a global, scalable semiconductor intellectual property business. In 2004, Warren founded IPextreme with the mission of unlocking and monetizing captive IP held within semiconductor companies and making it available to customers all over the world. Warren holds a BS in Computer Engineering from Santa Clara University and an MBA from Pepperdine University.
1:20 Technical Presentation by Silvaco
Topic: Designing IP With Silvaco EDA Tools
Speaker: Brian Bradburn, Sr. Director
Abstract: Brian Bradburn is Head of Silvaco's EDA product group, driving the design, development and vision of the front-end and back-end flow of products. Formerly a senior engineering manager, Bradburn has extensive experience in developing and managing large-scale applications for a wide range of products, including e-mail monitoring programs, and system diagnostic and circuit design tools.
1:50 Technical Presentation by Toshiba Information Systems (Japan) Corporation
Topic: Making Silicon Dreams Come True
Speaker: Peng Liu, Marketer/Field Applications Engineer, LSI Services Division
Abstract: Design services are an increasingly important part of the semiconductor ecosystem, evolving to adapt to the needs of the customer. We will present some examples of the design challenges that our customers have faced and how we have addressed them with a variety of methodologies, skills, and experience to provide differentiated products to our customers. We will also offer an overview of our IP products and turnkey service.
2:20-2:30 Short Break
2:30 Technical Presentation by Certus Semiconductor
Topic: Conquering Your Fears of Custom IP
Speaker: Stephen Fairbanks, Managing Director
Abstract: Reliability, cost, and working silicon are the key concerns for designers considering using custom IP to differentiate their chips from those of competitors. Custom IP can seem like an additional risk, but in actuality, it can be the secret weapon that helps you to take your design to the next level. Let’s explore how customers can collaborate with their IP suppliers to ensure success.
3:00 Afternoon Panel Discussion: IP: Product or Service?
Moderator: Rich Goldman, Partner, Silicon Catalyst
Hans Bouwmeester, VP Engineering Operations, Open-Silicon
Rob Cosaro, Fellow, Silicon Valley Center, Freescale
Bruce Elder, Director, Intellectual Property and Licensing, IDT
Oliver Gunasekara, CEO & Co-Founder, NGCodec
Claude Moughanni, Senior Director of Solutions, Verification, Validation and Characterization, Lattice Semiconductor
Abstract: It is a debate as old as the semiconductor IP industry itself: is IP a product business or a service business? Might it potentially be both? This panel will explore this conundrum, including touching on the following questions:
• Is the IP industry primarily rooted in products or services?
• What are the benefits to offering both products and services? What are the difficulties?
• What does the average customer want? Off-the-shelf? Partial customization? Full custom? What are the various challenges of each?
We will conclude the discussion with a brief roundtable segment in which the audience may pose questions to the moderator and panelists.

Networking Reception (4:00 PM)
Sponsored by EDA Consortium

Enjoy beautiful autumn weather, a guided wine tasting flight of five Testarossa vintages and engaging conversation in Testarossa’s picturesque Wine Bar 107 courtyard.