Multi Reference Clock Generator (MRCG) is a PLL replacement technology designed by Motorola research for use in its mobile phones. The MRCG’s output frequencies can be changed, stopped, or started, glitch free, by simply writing a value to its programming register.
Multi-Core Debug Solution (MCDS) adds logic analyzer and ICE-like access to signals buried deep in large SoC designs for real-time debug of complex multi-processor SoC designs.
XPack is a comprehensive web-based solution for IP packaging, IP distribution and IP support. XPack has been proven with distribution of IP to both internal design groups and external customers. IPextreme developed XPack and currently all of IPextreme’s operations use the XPack infrastructure. XPack is now available for license to solve your IP distribution needs.
CoReUse is a complete methodology for designing for reuse. CoReUse establishes the best practices and provides a series of flows that allow the user to create semiconductor IP that integrates easily into a SoC design.